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? 2011 microchip technology inc. preliminary ds41580a PIC18F14K22LIN data sheet 20-pin flash microcontrollers with integrated lin transceiver and voltage regulator
ds41580a-page 2 preliminary ? 2011 microchip technology inc. information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, appl ication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, total endurance, tsharc, uniwindriver, wiperlock and zena are trademarks of microchip tec hnology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2011, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-61341-171-1 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specifications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconductor manufacturer c an guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvi ng the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
? 2011 microchip technology inc. preliminary ds41580a-page 3 PIC18F14K22LIN cross-referenced material: this data sheet refers heavily to the following microchip data sheets: ? pic18f1xk22/lf1xk22 data sheet (ds41365) ? mcp2021/2, lin tranceiver with voltage regula- tor data sheet (ds22018) please have these documents available when reading this device specification. only deviations from the data sheets listed above will be noted. devices included in this data sheet: ? PIC18F14K22LIN high-performance risc cpu: ? c compiler optimized architecture/instruction set ? 256 bytes data eeprom ? linear program memory addressing to 16 kbytes ? linear data memory addressing to 512 bytes ? up to 16 mips operation ? 16-bit wide instructions, 8-bit wide data path ? priority levels for interrupts ? 31-level, software accessible hardware stack ? 8 x 8 single-cycle hardware multiplier flexible oscillator structure: ? precision 16 mhz internal oscillator block: - factory calibrated to 1% - software selectable frequencies range of 31 khz to 16 mhz - 64 mhz performance available using pll ? no external components required ? four crystal modes up to 64 mhz ? two external clock modes up to 64 mhz ? 4x phase-lock loop (pll) ? secondary oscillator using timer1 @ 32 khz ? fail-safe clock monitor: - allows for safe shutdown if peripheral clock stops ? two-speed oscillator start-up special microcontroller features: ? full 5.5v operation ? self-reprogrammable under software control ? power-on reset (por), power-up timer (pwrt) and oscillator start-up timer (ost) ? programmable brown-out reset (bor) ? extended watchdog timer (wdt) with on-chip oscillator and software enable ? programmable code protection ? in-circuit serial programming? (icsp?) via two pins ? in-circuit debug via two pins power managed modes: ? run ? cpu on, peripherals on ? idle ? cpu off, peripherals on ? sleep ? cpu off, peripherals off analog features: ? analog-to-digital (a/d) converter module: - 10-bit resolution - 9 analog input channels - auto acquisition capability - conversion available during sleep ? analog comparator module with: - two rail-to-rail analog comparators - comparator inputs and outputs externally accessible and configurable ? voltage reference module with: - programmable on-chip voltage reference (cv ref ) module (% of v dd ) - fixed voltage reference (fvr) with multiple reference voltages peripheral features: ? 12 i/o pins and 1 input only pin: - high current sink/source 25 ma/25 ma - individually programmable weak pull-ups - individually programmable interrupt-on-pin change ? three external interrupt pins ? four timer modules: - 3 16-bit timers/counters with prescaler - 1 8-bit timer/counter with 8-bit period register, prescaler and postscaler - dedicated, low-power timer1 oscillator 20-pin flash microcontrollers with integrated lin transceiver and voltage regulator
PIC18F14K22LIN ds41580a-page 4 preliminary ? 2011 microchip technology inc. ? enhanced capture/compare/pwm (eccp) module with: - one, two or four pwm outputs - selectable polarity - programmable dead time - auto-shutdown and auto-restart - pwm output steering control ? enhanced universal synchronous asynchronous receiver transmitter module (eusart): - supports rs-232, rs-485 and lin 2.0 - auto-baud detect - auto wake-up on start bit ? sr latch (555 timer) module with: - configurable inputs and outputs - supports mtouch? capacitive sensing applications ? on-board voltage regulator: - output voltage of 5.0v with tolerances of 3% over temperature range - maximum continuous input voltage of 30v - internal thermal overload protection - internal short circuit current limit - external components limited to filter capacitor only and load capacitor - automatic thermal shutdown ? internal bus transceiver compliant with lin bus specifications 1.3, 2.0 and 2.1 and are compliant to sae j2602: - support baud rates up to 20 kbaud - 43v load dump protected - very low emi meets stringent oem require- ments - wide supply voltage, 6.0v-18.0v continuous: - internal pull-up resistor and diode - protected against ground shorts - protected against loss of ground - high current drive - automatic thermal shutdown ? extended temperature range: -40 to +125c
? 2011 microchip technology inc. preliminary ds41580a-page 5 PIC18F14K22LIN table 1: device overview pin diagrams device program memory data memory pins i/o 10-bit a/d channels comparators timers 8-bit/16-bit eccp eusart (1) sr latch other features bytes words sram (bytes) data eeprom (bytes) PIC18F14K22LIN 16k 8k 512 256 20 13 9-ch 2 1/3 1 1 yes lin transceiver, voltage regulator note 1: eusart dedicated to lin communications. 20-pin ssop 10 2 3 4 5 6 1 8 7 9 11 12 13 14 15 16 19 20 18 17 v dd ra5/osc1/clkin/t13cki ra4/an3/osc2/clkout ra3/mclr /v pp rc5/ccp1/p1a rc4/c2out/p1b/srq rc3/an7/c12in3-/p1c/pgm vss l bus v reg v ss ra0/an0/cv ref /v ref -/c1in+/int0/pgd ra1/an1/c12in0-/v ref +/int1/pgc ra2/an2/c1out/t0cki/int2/srq rc0/an4/c2in+ rc1/an5/c12in1- rc2/an6/c12in2-/p1d rb4 / an10 fault /txe v bat PIC18F14K22LIN
PIC18F14K22LIN ds41580a-page 6 preliminary ? 2011 microchip technology inc. figure 1: PIC18F14K22LIN block diagram instruction decode and control porta portb portc ra1 ra0 data latch data memory address latch data address<12> 12 access bsr fsr0 fsr1 fsr2 inc/dec logic address 4 12 4 pch pcl pclath 8 31-level stack program counter prodl prodh 8 x 8 multiply 8 bitop 8 8 alu<8> 20 8 8 table pointer<21> inc/dec logic 21 8 data bus<8> table latch 8 ir 12 3 rom latch pclatu pcu note 1: ra3 is only available when mclr functionality is disabled. 2: osc1/clkin and osc2/clkout are only available in select oscillator modes and when these pins are not being used as digital i/o. refer to ds41365, ? pic18(l)f1xk22 data sheet ?, section 2.0 ?oscillator module? for additional information. comparator 10-bit adc timer2 timer1 timer3 timer0 eccp1 bor data eeprom w instruction bus <16> stkptr bank 8 state machine control signals decode 8 8 power-up timer oscillator start-up timer power-on reset watchdog timer osc1 (2) osc2 (2) v dd , internal oscillator fail-safe clock monitor precision reference band gap v ss mclr (1) block lfintosc oscillator 16 mhz oscillator single-supply programming fvr fvr fvr cv ref address latch program memory data latch cv ref ra3 ra4 ra5 rb4 rc0 rc1 rc2 rc3 rc4 rc5 (512/768 bytes) ldo regulator ra1 eusart tx rx transceiver l bus fault / txe voltage regulator rb6 e nable r eset v ss v reg v bat rb5 rb7 rc7 rc6 nc
? 2011 microchip technology inc. preliminary ds41580a-page 7 PIC18F14K22LIN table 2: PIC18F14K22LIN pin summary 20-pin ssop i/o analog comparator reference eccp eusart sr latch timers interrupts pull-up basic 19 ra0 an0 c1in+ v ref -/cv ref ? ? ??ioc/int0y pgd 18 ra1 an1 c12in0- v ref + ? ? ? ? ioc/int1 y pgc 17 ra2 an2 c1out ? ? ? srq t0cki ioc/int2 y ? 4 ra3 ? ? ? ? ? ? ? ioc y mclr /v pp 3ra4an3 ? ? ? ? ? ? ioc y osc2/clkout 2 ra5 ? ? ? ? ? ? t13cki ioc y osc1/clkin 13 rb4 an10 ? ? ? ? ? ? ioc y ? note rb5 ? ? ? ? rxd ? ? ? ? ? note rb6 ? ? ? ? ? ? ? ? ? cs/lwake note rb7 ? ? ? ? txd ? ? ? ? ? 16 rc0 an4 c2in+ ? ? ? ? ? ? ? ? 15 rc1 an5 c12in1- ? ? ? ? ? ? ? ? 14 rc2 an6 c12in2- ? p1d ? ? ? ? ? ? 7 rc3 an7 c12in3- ? p1c ? ? ? ? ? pgm 6 rc4 c2out ? p1b ? srq ???? 5 rc5 ? ? ? ccp1/p1a ? ? ? ? ? ? note rc6 ? ? ? ? ? ? ? ? ? no connection note rc7 ? ? ? ? ? ? ? ? ? reset input from voltage regulator 12 fault / txe ?? ? ? ??? ?? 11 vbat ? ? ? ? ? ? ? ? ? 10 vreg ? ? ? ? ? ? ? ? ? 9lbus? ? ? ? ? ? ? ? ? 8 ? ? ? ? ? ? ? ? ? ? v ss 1?? ? ? ? ? ?? ? ? v dd 20 ? ? ? ? ? ? ? ? ? ? v ss note 1: internal connection. no associated external pin.
PIC18F14K22LIN ds41580a-page 8 preliminary ? 2011 microchip technology inc. table of contents 1.0 using the mcp200x in lin bus applications ................................................................................... ............................................ 9 2.0 memory organization ......................................................................................................... ........................................................ 17 3.0 i/o ports ................................................................................................................... .................................................................. 23 4.0 master synchronous serial port (mssp) module ................................................................................ ...................................... 31 5.0 analog-to-digital converter (adc) module .................................................................................... ............................................ 33 6.0 enhanced universal synchronous asynchronous receiver transmitter (eusart) ................................................... .............. 35 7.0 lin/j2602 transceiver and voltage regulator ................................................................................. ......................................... 41 8.0 electrical specifications................................................................................................... ........................................................... 43 9.0 dc and ac characteristics graphs and tables ................................................................................. ........................................ 49 10.0 development support........................................................................................................ ......................................................... 51 11.0 packaging information...................................................................................................... .......................................................... 55 appendix a: revision history................................................................................................... ............................................................ 59 to our valued customers it is our intention to provide our valued customers with the be st documentation possible to ensure successful use of your micro chip products. to this end, we will continue to improve our publications to better suit your needs. our publications will be refined and enhanced as new volumes and updates are introduced. if you have any questions or comments regardi ng this publication, please contact the marketing communications department via e-mail at docerrors@microchip.com or fax the reader response form in the back of this data sheet to (480) 792-4150. we welcome your feedback. most current data sheet to obtain the most up-to-date version of this data s heet, please register at our worldwide web site at: http://www.microchip.com you can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page . the last character of the literature number is the vers ion number, (e.g., ds30000a is version a of document ds30000). errata an errata sheet, describing minor operational differences fr om the data sheet and recommended workarounds, may exist for curren t devices. as device/documentation issues become known to us, we will publish an errata sheet. the errata will specify the revisi on of silicon and revision of document to which it applies. to determine if an errata sheet exists for a particular device, please check with one of the following: ? microchip?s worldwide web site; http://www.microchip.com ? your local microchip sales office (see last page) when contacting a sales office, please specify which device, re vision of silicon and data sheet (include literature number) you are using. customer notification system register on our web site at www.microchip.com to receive the most current information on all of our products.
? 2011 microchip technology inc. preliminary ds41580a-page 9 PIC18F14K22LIN 1.0 using the mcp200x in lin bus applications 1.1 hardware the mcp200x internal connections are optimized to reduce the number of components in a typical lin/ j2602 node in a lin bus system. some features and modules of the stand-alone pic18f14k22 are no longer available or their functionality has changed. figure 1-1: typical li n network configuration for this reason, the following ( example 1-1 ) is a recommended block diagram. note the microcontroller is powered by the internal voltage regulator and an external connection must be made between v reg and v bb along with a load capacitor. fault /txe can be monitored or controlled by any i/o pin. note: failure to follow the recommended setup and initialization may result in improper or unknown lin operation. lin bus mcp202x master c 1k ? v bb slave 1 c slave 2 c slave n <16 c 40m + return lin bus lin bus mcp202x lin bus pic18f1xk22lin lin bus mcp202x
PIC18F14K22LIN ds41580a-page 10 preliminary ? 2011 microchip technology inc. example 1-1: typical pic1 8f14k22lin application 1.2 software please refer to the sections of this data sheet to deter- mine what facilities have changed and what register values need to be properly initialized. failure to follow these guidelines may result in improper operation. 1.2.1 typical initialization code initialiseioports movlb 0xf ;point the f bank movlw 0x04 ;disable an8:9,11 andwf anselh,f movlw 0xc0 ;portb7:6 must be inputs iorwf trisb,f movlw 0xcf ;portb5:4 must be outputs andwf trisb,f bsf lincs ;chip select transceiver movlw 0x80 iorwf trisc,f ;portc7 is an input return setuplinusart movlb 0x0f ;register bank 0xf movlw b'10010000' ;uart enabled,8-bit,continuous receive movwf rcsta movlw b'00000100' ;8-bit, asynchronous, high-baudrate movwf txsta lin bus 27v (2) v bb l bus v reg v ss v dd +12 c f (1) c g fault/ txe i/o 43v (3) 1k ? +12 master node only note 1: c f is the filter capacitor for the external voltage supply. 2: transient suppressor diode. v clamp l = 27v. 3: these components are required for additional load dump protection above 43v. r tp (3) v ss
? 2011 microchip technology inc. preliminary ds41580a-page 11 PIC18F14K22LIN movlw b'00001000' ;16-bit baud rate generator movwf baudcon clrf spbrgh movlw 0x31 ;setup initially for 20kbaud @ 4.0mhz, brgh=1, brg16=1 movwf spbrg bsf lincs ;to enable transceiver return 1.3 sample transmit software this routine is called when pir1 = 1 : putdatabyte movf indf0,w ; copy data byte into w-register movwf txreg incf fsr0, f ; point to next location decfsz message_counter, f ; decrement message counter by one return 1.4 sample receive software the following routines are called when pir1 = 1 : getbreak btfss rcsta,ferr ; was break character longer than 8 bits? goto badbreakchar ; no, not a valid break, too short movf rcreg,w ; dump break character, reset rcif and ferr btfss status,z goto badbreakchar ; no, not a valid break, not zero decf message_counter btfss linrx goto $-2 bsf baudctl,abden ; enable autobaud return badbreakchar movf rcreg,w ; dump break character, reset rcif and ferr return getsync btfsc baudctl,abdovf; did baud rate generator overflow? goto badsyncchar; yes, bad sync character btfsc rcsta,ferr; was there a framing error? goto badsyncchar; yes, bad sync character decf spbrg movf rcreg,w ; dump sync character, reset rcif decf message_counter return badsyncchar bcf baudctl,abdovf; clear the overflow condition movlw .12 ; reset the state machine movwf message_counter return getdatabyte movf rcreg,w ; get character, reset rcif and ferr movwf rxtx_reg ; copy data into w-register movwf indf0 ; copy data into data area incf fsr0, f ; point to next location decf message_counter, f ; decrement number of bytes to receive by one return
PIC18F14K22LIN ds41580a-page 12 preliminary ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. preliminary ds41580a-page 17 PIC18F14K22LIN 2.0 memory organization see ds41365, ?pic18f1xk22/lf1xk22 data sheet? for descriptions of program memory, data ram and data eeprom.
PIC18F14K22LIN ds41580a-page 18 preliminary ? 2011 microchip technology inc. table 2-1: special function register map for PIC18F14K22LIN devices address name address name address name address name address name fffh tosu fd7h tmr0h fafh spbrg f87h ? (2) f5fh ? (2) ffeh tosh fd6h tmr0l faeh rcreg f86h ? (2) f5eh ? (2) ffdh tosl fd5h t0con fadh txreg f85h ? (2) f5dh ? (2) ffch stkptr fd4h ? (2) fach txsta (3) f84h ? (2) f5ch ? (2) ffbh pclatu fd3h osccon fabh rcsta (3) f83h ? (2) f5bh ? (2) ffah pclath fd2h osccon2 faah eeadrh f82h portc (3) f5ah ? (2) ff9h pcl fd1h wdtcon fa9h eeadr f81h portb (3) f59h ? (2) ff8h tblptru fd0h rcon fa8h eedata f80h porta f58h ? (2) ff7h tblptrh fcfh tmr1h fa7h eecon2 (1) f7fh anselh (3) f57h ? (2) ff6h tblptrl fceh tmr1l fa6h eecon1 f7eh ansel f56h ? (2) ff5h tablat fcdh t1con fa5h ? (2) f7dh ? (2) f55h ? (2) ff4h prodh fcch tmr2 fa4h ? (2) f7ch ? (2) f54h ? (2) ff3h prodl fcbh pr2 fa3h ? (2) f7bh ? (2) f53h ? (2) ff2h intcon fcah t2con fa2h ipr2 f7ah iocb ff1h intcon2 fc9h sspbuf (3) fa1h pir2 f79h ioca ff0h intcon3 fc8h sspadd (3) fa0h pie2 f78h wpub fefh indf0 (1) fc7h sspstat (3) f9fh ipr1 (3) f77h wpua feeh postinc0 (1) fc6h sspcon1 (3) f9eh pir1 (3) f76h slrcon fedh postdec0 (1) fc5h sspcon2 (3) f9dh pie1 (3) f75h ? (2) fech preinc0 (1) fc4h adresh f9ch ? (2) f74h ? (2) febh plusw0 (1) fc3h adresl f9bh osctune f73h ? (2) feah fsr0h fc2h adcon0 f9ah ? (2) f72h ? (2) fe9h fsr0l fc1h adcon1 f99h ? (2) f71h ? (2) fe8h wreg fc0h adcon2 f98h ? (2) f70h ? (2) fe7h indf1 (1) fbfh ccpr1h f97h ? (2) f6fh sspmask (3) fe6h postinc1 (1) fbeh ccpr1l f96h ? (2) f6eh ? (2) fe5h postdec1 (1) fbdh ccp1con f95h ? (2) f6dh cm1con0 fe4h preinc1 (1) fbch vrefcon2 f94h trisc (3) f6ch cm2con1 fe3h plusw1 (1) fbbh vrefcon1 f93h trisb (3) f6bh cm2con0 fe2h fsr1h fbah vrefcon0 f92h trisa f6ah ? (2) fe1h fsr1l fb9h pstrcon f91h ? (2) f69h srcon1 fe0h bsr fb8h baudcon (3) f90h ? (2) f68h srcon0 fdfh indf2 (1) fb7h pwm1con f8fh ? (2) f67h ? (2) fdeh postinc2 (1) fb6h eccp1as f8eh ? (2) f66h ? (2) fddh postdec2 (1) fb5h ? (2) f8dh ? (2) f65h ? (2) fdch preinc2 (1) fb4h ? (2) f8ch ? (2) f64h ? (2) fdbh plusw2 (1) fb3h tmr3h f8bh latc (3) f63h ? (2) fdah fsr2h fb2h tmr3l f8ah latb (3) f62h ? (2) fd9h fsr2l fb1h t3con f89h lata f61h ? (2) fd8h status fb0h spbrgh f88h ? (2) f60h ? (2) legend: = unimplemented data memory locations, read as ? 0 ?, note 1: this is not a physical register. 2: unimplemented registers are read as ? 0 ?. 3: registers in bold have functional differences. please refe r to appropriate chapters for details.
? 2011 microchip technology inc. preliminary ds41580a-page 19 PIC18F14K22LIN table 2-2: register file summary (PIC18F14K22LIN) file name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 value on por, bor tosu ? ? ? top-of-stack upper byte (tos<20:16>) ---0 0000 tosh top-of-stack, high byte (tos<15:8>) 0000 0000 tosl top-of-stack, low byte (tos<7:0>) 0000 0000 stkptr stkovf stkunf ? sp4 sp3 sp2 sp1 sp0 00-0 0000 pclatu ? ? ? holding register for pc<20:16> ---0 0000 pclath holding register for pc<15:8> 0000 0000 pcl pc, low byte (pc<7:0>) 0000 0000 tblptru ? ? ? program memory table pointer upper byte (tblptr<20:16>) ---0 0000 tblptrh program memory table pointer, high byte (tblptr<15:8>) 0000 0000 tblptrl program memory table pointer, low byte (tblptr<7:0>) 0000 0000 tablat program memory table latch 0000 0000 prodh product register, high byte xxxx xxxx prodl product register, low byte xxxx xxxx intcon gie/gieh peie/giel tmr0ie int0ie rabie tmr0if int0if rabif 0000 000x intcon2 rabpu intedg0 intedg1 intedg2 ?tmr0ip ? rabip 1111 -1-1 intcon3 int2ip int1ip ? int2ie int1ie ? int2if int1if 11-0 0-00 indf0 uses contents of fsr0 to address data memory ? value of fsr0 not changed (not a physical register) n/a postinc0 uses contents of fsr0 to address data memory ? value of fsr0 post-incremented (not a physical register) n/a postdec0 uses contents of fsr0 to address data memory ? value of fsr0 post-decremented (not a physical register) n/a preinc0 uses contents of fsr0 to address data memory ? value of fsr0 pre-incremented (not a physical register) n/a plusw0 uses contents of fsr0 to address data memory ? value of fsr0 pre-incremented (not a physical register) ? value of fsr0 offset by w n/a fsr0h ? ? ? ? indirect data memory address pointer 0, high byte ---- 0000 fsr0l indirect data memory address pointer 0, low byte xxxx xxxx wreg working register xxxx xxxx indf1 uses contents of fsr1 to address data memory ? value of fsr1 not changed (not a physical register) n/a postinc1 uses contents of fsr1 to address data memory ? value of fsr1 post-incremented (not a physical register) n/a postdec1 uses contents of fsr1 to address data memory ? value of fsr1 post-decremented (not a physical register) n/a preinc1 uses contents of fsr1 to address data memory ? value of fsr1 pre-incremented (not a physical register) n/a plusw1 uses contents of fsr1 to address data memory ? value of fsr1 pre-incremented (not a physical register) ? value of fsr1 offset by w n/a fsr1h ? ? ? ? indirect data memory address pointer 1, high byte ---- 0000 fsr1l indirect data memory address pointer 1, low byte xxxx xxxx bsr ? ? ? ? bank select register ---- 0000 indf2 uses contents of fsr2 to address data memory ? value of fsr2 not changed (not a physical register) n/a postinc2 uses contents of fsr2 to address data memory ? value of fsr2 post-incremented (not a physical register) n/a postdec2 uses contents of fsr2 to address data memory ? value of fsr2 post-decremented (not a physical register) n/a preinc2 uses contents of fsr2 to address data memory ? value of fsr2 pre-incremented (not a physical register) n/a plusw2 uses contents of fsr2 to address data memory ? value of fsr2 pre-incremented (not a physical register) ? value of fsr2 offset by w n/a fsr2h ? ? ? ? indirect data memory address pointer 2, high byte ---- 0000 fsr2l indirect data memory address pointer 2, low byte xxxx xxxx status ? ? ?n ov z dcc ---x xxxx legend: x = unknown, u = unchanged, ? = unimplemented, q = value depends on condition note 1: the sboren bit is only available when the boren<1:0> configuration bits = 01 ; otherwise it is disabled and reads as ? 0 ?. refer to ds41365, ? pic18(l)f1xk22 data sheet ?, section 21.4 ?brown-out reset (bor)? for additional information 2: the ra3 bit is only available when master clear reset is disabled (mclre configuration bit = 0 ). otherwise, ra3 reads as ? 0 ?. this bit is read-only. 3: rows highlighted in black show required values for normal lin protocol applications.
PIC18F14K22LIN ds41580a-page 20 preliminary ? 2011 microchip technology inc. tmr0h timer0 register, high byte 0000 0000 tmr0l timer0 register, low byte xxxx xxxx t0con tmr0on t08bit t0cs t0se psa t0ps2 t0ps1 t0ps0 1111 1111 osccon idlen ircf2 ircf1 ircf0 osts hfiofs scs1 scs0 0011 qq00 osccon2 ? ? ? ? ? pri_sd hfiofl lfiofs ---- -10x wdtcon ? ? ? ? ? ? ?swdten --- ---0 rcon ipen sboren (1) ?ri to pd por bor 0q-1 11q0 tmr1h timer1 register, high byte xxxx xxxx tmr1l timer1 register, low bytes xxxx xxxx t1con rd16 t1run t1ckps1 t1ckps0 t1oscen t1sync tmr1cs tmr1on 0000 0000 tmr2 timer2 register 0000 0000 pr2 timer2 period register 1111 1111 t2con ? t2outps3 t2outps2 t2outps1 t2outps0 tmr2on t2ckps1 t2ckps0 -000 0000 sspbuf (3) x x x x x x x x xxxx xxxx sspadd (3) 0 0 0 0 0 0 0 0 0000 0000 sspstat (3) 0 0 0 0 0 0 0 0 0000 0000 sspcon1 (3) 0 0 0 0 0 0 0 0 0000 0000 sspcon2 (3) 0 0 0 0 0 0 0 0 0000 0000 adresh a/d result register, high byte xxxx xxxx adresl a/d result register, low byte xxxx xxxx adcon0 ? ? chs3 chs2 chs1 chs0 go/done adon --00 0000 adcon1 ? ? ? ? pvcfg1 pvcfg0 nvcfg1 nvcfg0 ---- 0000 adcon2 adfm ? acqt2 acqt1 acqt0 adcs2 adcs1 adcs0 0-00 0000 ccpr1h capture/compare/pwm register 1, high byte xxxx xxxx ccpr1l capture/compare/pwm register 1, low byte xxxx xxxx ccp1con p1m1 p1m0 dc1b1 dc1b0 ccp1m3 ccp1m2 ccp1m1 ccp1m0 0000 0000 vrefcon2 ? ? ? dac1r4 dac1r3 dac1r2 dac1r1 dac1r0 ---0 0000 vrefcon1 d1en d1lps dac1oe --- d1pss1 d1pss0 ? d1nss 000- 00-0 vrefcon0 fvr1en fvr1st fvr1s1 fvr1s0 ? ? ? ? 0001 ---- pstrcon ? ? ? strsync strd strc strb stra ---0 0001 baudcon (3) abdovf rcidl 0 0 brg16 ? wue abden 0100 0-00 pwm1con prsen pdc6 pdc5 pdc4 pdc3 pdc2 pdc1 pdc0 0000 0000 eccp1as eccpase eccpas2 eccpas1 eccpas0 pssac1 pssac0 pssbd1 pssbd0 0000 0000 tmr3h timer3 register, high byte xxxx xxxx tmr3l timer3 register, low byte xxxx xxxx t3con rd16 ? t3ckps1 t3ckps0 t3ccp1 t3sync tmr3cs tmr3on 0-00 0000 table 2-2: register file summary (PIC18F14K22LIN) (continued) file name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 value on por, bor legend: x = unknown, u = unchanged, ? = unimplemented, q = value depends on condition note 1: the sboren bit is only available when the boren<1:0> configuration bits = 01 ; otherwise it is disabled and reads as ? 0 ?. refer to ds41365, ? pic18(l)f1xk22 data sheet ?, section 21.4 ?brown-out reset (bor)? for additional information 2: the ra3 bit is only available when master clear reset is disabled (mclre configuration bit = 0 ). otherwise, ra3 reads as ? 0 ?. this bit is read-only. 3: rows highlighted in black show required values for normal lin protocol applications.
? 2011 microchip technology inc. preliminary ds41580a-page 21 PIC18F14K22LIN spbrgh eusart baud rate generator register, high byte 0000 0000 spbrg eusart baud rate generator register, low byte 0000 0000 rcreg eusart receive register 0000 0000 txreg eusart transmit register 0000 0000 txsta (3) 0 0 txen 0 sendb brgh trmt 0 0000 0010 rcsta (3) spen 0 0 cren 0 ferr oerr 0 0000 000x eeadr eeadr7 eeadr6 eeadr5 eeadr4 eeadr3 eeadr2 eeadr1 eeadr0 0000 0000 eeadrh ? ? ? ? ? ? eeadr9 eeadr8 ---- --00 eedata eeprom data register 0000 0000 eecon2 eeprom control register 2 (not a physical register) 0000 0000 eecon1 eepgd cfgs ? free wrerr wren wr rd xx-0 x000 ipr2 oscfip c1ip c2ip eeip bclip ? tmr3ip ? 1111 111- pir2 oscfif c1if c2if eeif bclif ? tmr3if ? 0000 000- pie2 oscfie c1ie c2ie eeie bclie ? tmr3ie ? 0000 000- ipr1 (3) ? adip rcip txip 1 ccp1ip tmr2ip tmr1ip -111 1111 pir1 (3) ? adif rcif txif 0 ccp1if tmr2if tmr1if -000 0000 pie1 (3) ? adie rcie txie 0 ccp1ie tmr2ie tmr1ie -000 0000 osctune intsrc pllen tun5 tun4 tun3 tun2 tun1 tun0 0000 0000 trisc (3) trisc7 ? trisc5 trisc4 trisc3 trisc2 trisc1 trisc0 1111 1111 trisb (3) trisb7 trisb6 trisb5 trisb4 ? ? ? ? 1111 ---- trisa ? ? trisa5 trisa4 ? trisa2 trisa1 trisa0 --11 -111 latc (3) linreset ? latc5 latc4 latc3 latc2 latc1 latc0 xxxx xxxx latb (3) latb7 latb6 latb5 latb4 ? ? ? ? xxxx ---- lata ? ? lata5 lata4 ? lata2 lata1 lata0 --xx -xxx portc (3) linreset ? rc5 rc4 rc3 rc2 rc1 rc0 xxxx xxxx portb (3) lintx lincs linrx rb4 ? ? ? ? xxxx ---- porta ? ? ra5 ra4 ra3 (2) ra2 ra1 ra0 --xx xxxx anselh (3) ? ? ? ? 0 ans10 0 0 ---- 1111 ansel ans7 ans6 ans5 an s4 ans3 ans2 ans1 ans0 1111 1111 iocb iocb7 iocb6 iocb5 iocb4 ? ? ? ? 0000 ---- ioca ? ? ioca5 ioca4 ioca3 ioca2 ioca1 ioca0 --00 0000 wpub wpub7 wpub6 wpub5 wpub4 ? ? ? ? 1111 ---- wpua ? ? wpua5 wpua4 wpua3 wpua2 wpua1 wpua0 --11 1111 slrcon ? ? ? ? ? reserved reserved reserved ---- -111 sspmsk (3) 1 1 1 1 1 1 1 1 1111 1111 cm1con0 c1on c1out c1oe c1pol c1sp c1r c1ch1 c1ch0 0000 1000 cm2con1 mc1out mc2out c1rsel c2rsel c1hys c2hys c1sync c2sync 0000 0000 cm2con0 c2on c2out c2oe c2pol c2sp c2r c2ch1 c2ch0 0000 1000 srcon1 srspe srscke srsc2e srsc1e srrpe srrcke srrc2e srrc1e 0000 0000 srcon0 srlen srclk2 srclk1 srclk0 srqen srnqen srps srpr 0000 0000 table 2-2: register file summary (PIC18F14K22LIN) (continued) file name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 value on por, bor legend: x = unknown, u = unchanged, ? = unimplemented, q = value depends on condition note 1: the sboren bit is only available when the boren<1:0> configuration bits = 01 ; otherwise it is disabled and reads as ? 0 ?. refer to ds41365, ? pic18(l)f1xk22 data sheet ?, section 21.4 ?brown-out reset (bor)? for additional information 2: the ra3 bit is only available when master clear reset is disabled (mclre configuration bit = 0 ). otherwise, ra3 reads as ? 0 ?. this bit is read-only. 3: rows highlighted in black show required values for normal lin protocol applications.
PIC18F14K22LIN ds41580a-page 22 preliminary ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. preliminary ds41580a-page 23 PIC18F14K22LIN 3.0 i/o ports 3.1 portb, trisb and latb registers portb is a 4-bit wide, bidirectional port. it functions the same as described in the ?pic18f1xk22/lf1xk22 data sheet? (ds41365) with the following differences. three bits are dedicated to the lin transceiver. no pins are associated with this function. only rb4 is available on a pin. the corresponding data direction register is trisb. the trisb bits must be set as ? 001x 0000 ?. the portb data latch register (latb) is also memory mapped. read-modify-write operations on the latb register read and write the latched output value for portb. example 3-1: init ializing portb . note: on a power-on reset, rb<5:4> are configured as analog inputs by default and read as ? 0 ?. movlw 0c0h ; set rb6 and rb7 ; high movwf portb ; initialize portb by ; clearing output ; data latches clrf latb ; alternate method ; to clear output ; data latches movlw 030h ; value used to ; initialize data ; direction movwf trisb ; set rb<7:6> as outputs ; and rb<5:4> as inputs register 3-1: port b: portb register r/w-x r/w-x r/w-x r/w-x u-0 u-0 u-0 u-0 lintx lincs linrx rb4 ? ? ? ? bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7 lintx : dedicated to the lin transceiver transmit function bit 6 lincs : dedicated to the lin transceiver chip select function bit 5 linrx : dedicated to the lin transceiver receive function bit 4 rb4 : portb i/o pin bit 1 = port pin is >v ih 0 = port pin is PIC18F14K22LIN ds41580a-page 24 preliminary ? 2011 microchip technology inc. register 3-2: trisb: po rtb tri-state register r/w-1 r/w-1 r/w-1 r/w-1 u-0 u-0 u-0 u-0 trisb7 trisb6 trisb5 trisb4 ? ? ? ? bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7-6 trisb<7:6>: portb tri-state control bits initialize as 0 = portb pin configured as an output bit 5-4 trisb<5:4>: portb tri-state control bits initialize as 1 = portb pin configured as an input (tri-stated) bit 3-0 unimplemented : read as ? 0 ? register 3-3: latb: portb data latch register r/w-x r/w-x r/w-x r/w-x u-0 u-0 u-0 u-0 latb7 latb6 latb5 latb4 ? ? ? ? bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7 latb7 : dedicated to the lin transceiver transmit function bit 6 latb6 : dedicated to the lin transceiver chip select function bit 5 latb5 : dedicated to the lin transceiver receive function bit 4 latb4 : rb<7:4> port i/o output latch register bits bit 3-0 unimplemented : read as ? 0 ?
? 2011 microchip technology inc. preliminary ds41580a-page 25 PIC18F14K22LIN register 3-4: wpub: weak pull-up portb register r/w-1 r/w-1 r/w-1 r/w-1 u-0 u-0 u-0 u-0 wpub7 wpub6 wpub5 wpub4 ? ? ? ? bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7-4 wpub<7:4>: weak pull-up enable bit 1 = pull-up enabled 0 = pull-up disabled bit 3-0 unimplemented : read as ? 0 ? register 3-5: iocb: interrup t-on-change portb register r/w-0 r/w-0 r/w-0 r/w-0 u-0 u-0 u-0 u-0 iocb7 iocb6 iocb5 iocb4 ? ? ? ? bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7-4 iocb<7:4> : interrupt-on-change bits 1 = interrupt-on-change enabled 0 = interrupt-on-change disabled bit 3-0 unimplemented : read as ? 0 ? table 3-1: portb i/o summary pin function tris setting i/o i/o type description rb4/an10/sdi/ sda rb4 0 o dig latb<4> data output. 1 i ttl portb<4> data input; programmable weak pull-up. an10 1 i ana adc input channel 10. rb5/an11/rx/dt rb5 0 o dig latb<5> data output. 1 i ttl portb<5> data input; programmable weak pull-up. rx 1 i st asynchronous serial receive data input (usart module). rb6/sck/scl rb6 0 o dig latb<6> data output. 1 i ttl portb<6> data input; programmable weak pull-up. rb7/tx/ck rb7 0 o dig latb<7> data output. 1 i ttl portb<7> data input; programmable weak pull-up. tx 1 odig asynchronous serial transmit data output (usart module). legend: dig = digital level output; ttl = ttl input buffer; st = schmitt trigger input buffer; ana = analog level input/output; x = don?t care (tris bit does not affect port direction or is overridden for this option).
PIC18F14K22LIN ds41580a-page 26 preliminary ? 2011 microchip technology inc. table 3-2: summary of registers associated with portb name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reset values on page anselh ? ? ? ? 0 ans10 0 0 30 intcon gie/gieh peie/giel tmr0ie int0ie rabie tmr0if int0if rabif ? (1) intcon2 rabpu intedg0 intedg1 intedg2 ? tmr0ip ?rabip? (1) iocb iocb7 iocb6 iocb5 iocb4 25 latb latb7 latb6 latb5 latb4 ? ? ? ? 24 portb lintx lincs linrx rb4 ? ? ? ? 23 rcsta spen 0 0 cren 0 ferr oerr 0 38 slrcon reserved ? (1) sspcon1 reserved ? (1) trisb trisb7 trisb6 trisb5 trisb4 ? ? ? ? 24 txsta 0 0 txen 0 sendb brgh trmt 0 37 wpub wpub7 wpub6 wpub5 wpub4 ? ? ? ? 25 legend: ? = unimplemented, read as ? 0 ?. shaded cells are not used by portb. 0 = must always be written as ? 0 ? to avoid undefined lin operation. note 1: information about these registers can be found in the ? pic18(l)f1xk22 data sheet? (ds41365) .
? 2011 microchip technology inc. preliminary ds41580a-page 27 PIC18F14K22LIN 3.2 portc, trisc and latc registers portc is an 8-bit wide, bidirectional port. it functions the same as described in the ?pic18f1xk22/lf1xk22 data sheet? (ds41365) with the following differences. one bit is dedicated to the lin transceiver and one bit is not available. no pins are associated with this func- tion. only rc<5:0> are available on pins. the corre- sponding data direction register is trisc. the trisc bits must be set as ? 1xxx xxxx ?. the portc data latch register (latc) is also mem- ory mapped. read-modify-write operations on the latc register read and write the latched output value for portc. example 3-2: initializing portc note: on a power-on reset, rc<7:6> and rc<3:0> are configured as analog inputs and read as ? 0 ?. clrf portc ; initialize portc by ; clearing output ; data latches clrf latc ; alternate method ; to clear output ; data latches movlw 0ffh ; value used to ; initialize data ; direction movwf trisc ; set rc<3:0> as inputs ; rc<5:4> as outputs ; rc<7:6> as inputs register 3-6: port c: portc register r/w-x r/w-x r/w-x r/w-x r/w-x r/w-x r/w-x r/w-x linreset ? rc5 rc4 rc3 rc2 rc1 rc0 bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7 linreset : lin reset input bit 1 = lin reset not asserted 0 = lin reset asserted bit 6 rc6 : no function bit 5-0 rc<5:0> : portc i/o pin bits 1 = port pin is > v ih 0 = port pin is < v il
PIC18F14K22LIN ds41580a-page 28 preliminary ? 2011 microchip technology inc. register 3-7: trisc: po rtc tri-state register r/w-1 r/w-1 r/w-1 r/w-1 r/w-1 r/w-1 r/w-1 r/w-1 trisc7 ? trisc5 trisc4 trisc3 trisc2 trisc1 trisc0 bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7 trisc7: portc tri-state control bits 1 = portc pin configured as lin reset input (tri-stated) 0 = do not use to avoid internal contention bit 6 trisc6: don?t care bit 5-0 trisc<5:0>: portc tri-state control bits 1 = portc pin configured as an input (tri-stated) 0 = portc pin configured as an output register 3-8: latc: portc data latch register r/w-x r/w-x r/w-x r/w-x r/w-x r/w-x r/w-x r/w-x linreset ? latc5 latc4 latc3 latc2 latc1 latc0 bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7 linreset : lin reset input bit 1 = lin reset not asserted 0 = lin reset asserted bit 6 latc6 : no function bit 5-0 latc<5:0> : rb<7:0> port i/o output latch register bits
? 2011 microchip technology inc. preliminary ds41580a-page 29 PIC18F14K22LIN table 3-3: portc i/o summary pin function tris setting i/o i/o type description rc0/an4/c2in+ rc0 0 o dig latc<0> data output. 1 i st portc<0> data input. an4 1 i ana a/d input channel 4. c2in+ 1 i ana comparators c2 non-inverting input. rc1/an5/ c12in1- rc1 0 o dig latc<1> data output. 1 i st portc<1> data input. an5 1 i ana a/d input channel 5. c12in1- 1 i ana comparators c1 and c2 inverting input, channel 1. rc2/an6/ c12in2-/p1d rc2 0 o dig latc<2> data output. 1 i st portc<2> data input. an6 1 i ana a/d input channel 6. c12in2- 1 i ana comparators c1 and c2 inverting input, channel 2. p1d 0 o dig eccp1 enhanced pwm output, channel d. rc3/an7/ c12in3-/p1c/ pgm rc3 0 o dig latc<3> data output. 1 i st portc<3> data input. an7 1 i ana a/d input channel 7. c12in3- 1 i ana comparators c1 and c2 inverting input, channel 3. p1c 0 o dig eccp1 enhanced pwm output, channel c. pgm x i st single-supply programming mode entry (icsp?). enabled by lvp configuration bit; all other pin functions disabled. rc4/c2out/p1b rc4 0 o dig latc<4> data output. 1 i st portc<4> data input. c2out 0 o dig comparator 2 output. p1b 0 o dig eccp1 enhanced pwm output, channel b. rc5/ccp1/p1a rc5 0 o dig latc<5> data output. 1 i st portc<5> data input. ccp1 0 o dig eccp1 compare or pwm output. 1 i st eccp1 capture input. p1a 0 0 dig eccp1 enhanced pwm output, channel a. rc6 rc6 unavailable rc7 rc7 1 i st portc<7> data input. legend: dig = digital level output; ttl = ttl input buffer; st = schmitt trigger input buffer; ana = analog level input/output; x = don?t care (tris bit does not affect port direction or is overridden for this option).
PIC18F14K22LIN ds41580a-page 30 preliminary ? 2011 microchip technology inc. table 3-4: summary of registers associated with portc 3.3 port analog control name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reset values on page ansel ans7 ans6 ans5 ans4 ans3 ans2 ans1 ans0 ? (1) anselh ? ? ? ? 0 ans10 0 0 30 ccp1con p1m1 p1m0 dc1b1 dc1b0 ccp1m3 ccp1m2 ccp1m1 ccp1m0 ? (1) eccp1as eccpase eccpas2 eccpas1 eccpas0 pssac1 pssac0 pssbd1 pssbd0 ? (1) intcon gie/gieh peie/giel tmr0ie int0ie rabie tmr0if int0if rabif ? (1) intcon2 rabpu intedg0 intedg1 intedg2 ? tmr0ip ? rabip ? (1) intcon3 int2ip int1ip ? int2ie int1ie ? int2if int1if ? (1) latc linreset ? latc5 latc4 latc3 latc2 latc1 latc0 28 portc linreset ? rc5 rc4 rc3 rc2 rc1 rc0 27 pstrcon ? ? ? strsync strd strc strb stra ? (1) vrefcon1 d1en d1lps dac1oe --- d1pss1 d1pss0 --- d1nss ? (1) slrcon ? ? ? ? ? reserved reserved reserved ? (1) sspcon1 wcol sspov sspen ckp sspm3 sspm2 sspm1 sspm0 ? (1) trisc trisc7 ? trisc5 trisc4 trisc3 trisc2 trisc1 trisc0 28 t1con rd16 t1run t1ckps1 t1ckps0 t1oscen t1sync tmr1cs tmr1on ? (1) t3con rd16 ? t3ckps1 t3ckps0 t3ccp1 t3sync tmr3cs tmr3on ? (1) legend: ? = unimplemented, read as ? 0 ?. shaded cells are not used by portb. 0 = must always be written as ? 0 ? to avoid undefined lin operation. note 1: information about these registers can be found in the ? pic18(l)f1xk22 data sheet? ( ds41365) . register 3-9: anselh: analog select high register u-0 u-0 u-0 u-0 r/w-1 r/w-1 r/w-1 r/w-1 ? ? ? ? 0 ans10 0 0 bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7-4 unimplemented: read as ? 0 ? bit 3 must be ? 0 ? bit 2 ans10: rb4 analog select control bit 1 = digital input buffer of rb4 is disabled 0 = digital input buffer of rb4 is enabled bit 1-0 must be ? 0 ?
? 2011 microchip technology inc. preliminary ds41580a-page 31 PIC18F14K22LIN 4.0 master synchronous serial port (mssp) module 4.1 master ssp (mssp) module overview the master synchronous serial port (mssp) module is not to be used as its operation conflicts with lin pin functions. table 4-1: registers associ ated with mssp operation name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reset values on page ipr1 ? adip rcip txip 1 ccp1ip tmr2ip tmr1ip ? (1) pie1 ? adie rcie txie 0 ccp1ie tmr2ie tmr1ie ? (1) pir1 ? adif rcif txif 0 ccp1if tmr2if tmr1if ? (1) trisc trisc7 ? trisc5 trisc4 trisc3 trisc2 trisc1 trisc0 28 sspadd 00000000 ? (1) sspbuf don?t care ? (1) sspcon1 00000000 ? (1) sspcon2 00000000 ? (1) sspmsk 11111111 ? (1) sspstat 00000000 ? (1) legend: shaded cells are not used by the mssp in spi mode. register bits shown above must not be changed from their initial values and read as shown. note 1: information about these registers can be found in the ? pic18(l)f1xk22 data sheet? (ds41365) .
PIC18F14K22LIN ds41580a-page 32 preliminary ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. preliminary ds41580a-page 33 PIC18F14K22LIN 5.0 analog-to-digital converter (adc) module the analog-to-digital converter (adc) allows conver- sion of an analog input signal to a 10-bit binary repre- sentation of that signal. it functions the same as described in the ?pic18f1xk22/lf1xk22 data sheet? (ds41365) with the following differences. figure 5-1: adc block diagram adc an4 av dd v ref + adon go/done chs<3:0> adresh adresl 10 10 adfm v ss an5 an6 an7 an3 reserved reserved an10 reserved av ss v ref - nvcfg[1:0] = 00 fvr 0000 0001 0010 0011 0100 0101 0111 0110 1000 1001 1010 1011 1100 1101 1110 1111 unused unused 0 = left justify 1 = right justify dac nvcfg[1:0] = 01 fvr pvcfg[1:0] = 00 pvcfg[1:0] = 01 pvcfg[1:0] = 10 an1 an2 an0 note: analog channels marked reserved are not available to pins.
PIC18F14K22LIN ds41580a-page 34 preliminary ? 2011 microchip technology inc. table 5-1: registers associated with a/d operation name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reset values on page adresh a/d result register, high byte ? (1) adresl a/d result register, low byte ? (1) adcon0 ? ? chs3 chs2 chs1 chs0 go/done adon ? (1) adcon1 ? ? ? ? pvcfg1 pvcfg0 nvcfg1 nvcfg0 ? (1) adcon2 adfm ? acqt2 acqt1 acqt0 adcs2 adcs1 adcs0 ? (1) ansel ans7 ans6 ans5 ans4 ans3 ans2 ans1 ans0 ? (1) anselh ? ? ? ? 0 ans10 0 0 30 intcon gie/gieh peie/giel tmr0ie int0ie rabie tmr0if int0if rabif ? (1) ipr1 ? adip rcip txip 1 ccp1ip tmr2ip tmr1ip ? (1) pie1 ? adie rcie txie 0 ccp1ie tmr2ie tmr1ie ? (1) pir1 ? adif rcif txif 0 ccp1if tmr2if tmr1if ? (1) trisa ? ? trisa5 trisa4 ? trisa2 trisa1 trisa0 ? (1) trisb trisb7 trisb6 trisb5 trisb4 ? ? ? ? 24 trisc trisc7 ? trisc5 trisc4 trisc3 trisc2 trisc1 trisc0 28 legend: ? = unimplemented, read as ? 0 ?. shaded cells are not used for a/d conversion 0 = must always be written as ? 0 ? to avoid undefined lin operation. note 1: information about these registers can be found in the ? pic18(l)f1xk22 data sheet? (ds41365) .
? 2011 microchip technology inc. preliminary ds41580a-page 35 PIC18F14K22LIN 6.0 enhanced universal synchronous asynchronous receiver transmitter (eusart) the enhanced universal synchronous asynchronous receiver transmitter (eusart) module is a serial i/o communications peripheral. it is the same as contained in the standard pic18f1xk22 (see ?pic18f1xk22/lf1xk22 data sheet? (ds41365) with the following exceptions: ? the 9-bit character length and address detection should never be selected ? synchronous master or slave modes are not sup- ported. ? programmable clock and data polarity should not be used. 6.1 eusart asynchronous lin transmitter 6.1.1 asynchronous lin transmission setup: 1. initialize the spbrgh:spbrg register pair and the brgh and brg16 bits to achieve the desired baud rate (see register 6-3 ). 2. enable the asynchronous serial port by clearing the sync bit and setting the spen bit. 3. enable the transmission by setting the txen control bit. this will cause the txif interrupt bit to be set. 4. if interrupts are desired, set the txie interrupt enable bit. an interrupt will occur immediately provided that the gie and peie bits of the intcon register are also set. 5. load 8-bit data into the txreg register. this will start the transmission. table 6-1: registers associated with asynchronous transmission name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reset values on page baudcon abdovf rcidl 00brg16 ? wue abden 39 intcon gie/gieh peie/giel tmr0ie int0ie rabie tmr0if int0if rabif ? (1) ipr1 ? adip rcip txip 1 ccp1ip tmr2ip tmr1ip ? (1) pie1 ? adie rcie txie 0 ccp1ie tmr2ie tmr1ie ? (1) pir1 ? adif rcif txif 0 ccp1if tmr2if tmr1if ? (1) rcsta spen 0 0 cren 0 ferr oerr 0 38 spbrg eusart baud rate generator register, low byte ? (1) spbrgh eusart baud rate generator register, high byte ? (1) txreg eusart transmit register ? (1) txsta 0 0 txen 0 sendb brgh trmt 0 37 legend: ? = unimplemented locations read as ? 0 ?. shaded cells are not used for asynchronous transmission. 0 = must always be written as ? 0 ? to avoid undefined lin operation. note 1: information about these registers can be found in the ? pic18(l)f1xk22 data sheet? (ds41365) .
PIC18F14K22LIN ds41580a-page 36 preliminary ? 2011 microchip technology inc. 6.1.2 eusart asynchronous lin receiver 6.1.2.1 asynchronous reception setup: 1. initialize the spbrgh:spbrg register pair and the brgh and brg16 bits to achieve the desired baud rate (see register 6-3 ). 2. enable the serial port by setting the spen bit and the rx/dt pin tris bit. the sync bit must be clear for asynchronous operation. 3. if interrupts are desired, set the rcie interrupt enable bit and set the gie and peie bits of the intcon register. 4. enable reception by setting the cren bit. 5. the rcif interrupt flag bit will be set when a character is transferred from the rsr to the receive buffer. an interrupt will be generated if the rcie interrupt enable bit was also set. 6. read the rcsta register to get the error flags and, if 9-bit data reception is enabled, the ninth data bit. 7. get the received 8 least significant data bits from the receive buffer by reading the rcreg register. 8. if an overrun occurred, clear the oerr flag by clearing the cren receiver enable bit. table 6-2: registers associated with asynchronous reception name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reset values on page baudcon abdovf rcidl 0 0brg16 ? wue abden 39 intcon gie/gieh peie/giel tmr0ie int0ie rabie tmr0if int0if rabif ? (1) ipr1 ? adip rcip txip 1 ccp1ip tmr2ip tmr1ip ? (1) pie1 ? adie rcie txie 0 ccp1ie tmr2ie tmr1ie ? (1) pir1 ? adif rcif txif 0 ccp1if tmr2if tmr1if ? (1) rcreg eusart receive register ? (1) rcsta spen 0 0 cren 0 ferr oerr 0 38 spbrg eusart baud rate generator register, low byte ? (1) spbrgh eusart baud rate generator register, high byte ? (1) trisc trisc7 ? trisc5 trisc4 trisc3 trisc2 trisc1 trisc0 ? (1) txsta 0 0 txen 0 sendb brgh trmt 0 37 legend: ? = unimplemented locations read as ? 0 ?. shaded cells are not used for asynchronous reception. note 1: information about these registers can be found in ? pic18(l)f1xk22 data sheet? (ds41365) .
? 2011 microchip technology inc. preliminary ds41580a-page 37 PIC18F14K22LIN register 6-1: txsta: transmit status and control register r/w-0 r/w-0 r/w-0 r/w-0 r/w-0 r/w-0 r-1 r/w-0 00txen (1) 0 sendb brgh trmt 0 bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7 must be ? 0 ? bit 6 must be ? 0 ? bit 5 txen: transmit enable bit (1) 1 = transmit enabled 0 = transmit disabled bit 4 must be ? 0 ? bit 3 sendb: send break character bit 1 = send sync break on next transmission (cleared by hardware upon completion) 0 = sync break transmission completed bit 2 brgh: high baud rate select bit asynchronous mode : 1 = high speed 0 = low speed bit 1 trmt: transmit shift register status bit 1 = tsr empty 0 = tsr full bit 0 must be ? 0 ? note 1: sren/cren overrides txen in sync mode.
PIC18F14K22LIN ds41580a-page 38 preliminary ? 2011 microchip technology inc. register 6-2: rcsta: receive status and control register (1) r/w-0 r/w-0 r/w-0 r/w-0 r/w-0 r-0 r-0 r-x spen 0 0 cren 0 ferr oerr 0 bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7 spen: serial port enable bit 1 = serial port enabled (configures rx/dt and tx/ck pins as serial port pins) 0 = serial port disabled (held in reset) bit 6 must be ? 0 ? bit 5 don?t care bit 4 cren: continuous receive enable bit 1 = enables receiver 0 = disables receiver bit 3 must be ? 0 ? bit 2 ferr: framing error bit 1 = framing error (can be updated by reading rcreg register and receive next valid byte) 0 = no framing error bit 1 oerr: overrun error bit 1 = overrun error (can be cleared by clearing bit cren) 0 = no overrun error bit 0 don?t care
? 2011 microchip technology inc. preliminary ds41580a-page 39 PIC18F14K22LIN register 6-3: baudcon: baud rate control register r-0 r-1 r/w-0 r/w-0 r/w-0 u-0 r/w-0 r/w-0 abdovf rcidl 0 0 brg16 ? wue abden bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7 abdovf: auto-baud detect overflow bit asynchronous mode : 1 = auto-baud timer overflowed 0 = auto-baud timer did not overflow synchronous mode : don?t care bit 6 rcidl : receive idle flag bit asynchronous mode : 1 = receiver is idle 0 = start bit has been detected and the receiver is active synchronous mode : don?t care bit 5 must be ? 0 ? bit 4 must be ? 0 ? bit 3 brg16: 16-bit baud rate generator bit 1 = 16-bit baud rate generator is used (spbrgh:spbrg) 0 = 8-bit baud rate generator is used (spbrg) bit 2 unimplemented: read as ? 0 ? bit 1 wue: wake-up enable bit asynchronous mode : 1 = receiver is waiting for a falling edge. no character will be received but rcif will be set on the falling edge. wue will automatically clear on the rising edge. 0 = receiver is operating normally synchronous mode : don?t care bit 0 abden : auto-baud detect enable bit asynchronous mode : 1 = auto-baud detect mode is enabled (clears when auto-baud is complete) 0 = auto-baud detect mode is disabled synchronous mode : don?t care
PIC18F14K22LIN ds41580a-page 40 preliminary ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. preliminary ds41580a-page 41 PIC18F14K22LIN 7.0 lin/j2602 transceiver and voltage regulator please refer to ?mcp2021/2, lin transceiver with volt- age regulator data sheet? (ds22018). only differ- ences in the PIC18F14K22LIN are noted here. the lin/j2602 transceiver provides a physical inter- face to a lin half-duplex bus. it is intended for automo- tive and industrial applications with serial bus speeds up to 20 kbaud. the PIC18F14K22LIN provides a +5v 50 ma regulated power output. 7.1 pin descriptions 7.1.1 power output (v reg ) positive supply voltage regulator output pin. 7.1.2 ground (v ss ) ground pin. 7.1.3 battery (v bb ) battery positive supply voltage pin. this pin is also the input for the internal voltage regulator. 7.1.4 lin bus the bidirectional lin bus interface pin is the driver unit for the lin pin. 7.1.5 fault /txe fault detect output and transmitter enable input bidirectional pin. 7.2 internal connections 7.2.1 transmit data input (txd) the transmit data input pin has an internal pull-up to v reg . the lin pin is low (dominant) when txd is low. internally connected to portb<7>. 7.2.2 receive data output (rxd) the receive data output pin is a standard cmos output and follows the state of the lin pin. it is internally connected to portb<5>. 7.2.3 cs/lwake chip select input pin. it is internally connected to portb<6>. 7.2.4 reset reset is an open-drain output. it is internally connected to portc<7>.
PIC18F14K22LIN ds41580a-page 42 preliminary ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. preliminary ds41580a-page 43 PIC18F14K22LIN 8.0 electrical specifications absolute maximum ratings (?) ambient temperature under bias................................................................................................. ...... -40c to +125c storage temperature ............................................................................................................ ............ -65c to +150c voltage on v dd with respect to v ss , pic18f1xk22 ........................................................................... -0.3v to +6.0v voltage on v dd with respect to v ss , pic18lf1xk22 ......................................................................... -0.3v to +4.0v voltage on mclr with respect to v ss ................................................................................................. -0.3v to +9.0v voltage on all other pins with respect to v ss .............................................................................-0.3v to (v dd + 0.3v total power dissipation (1) ............................................................................................................................... 800 mw maximum current out of v ss pin ...................................................................................................................... 95 m a maximum current into v dd pin ......................................................................................................................... 9 5 ma clamp current, i k (v pin < 0 or v pin > v dd ) ??????????????????????????????????????????????????????????????? ??????????????????????????????????????????????????? 20 ma maximum output current sunk by any i/o pin..................................................................................... ............... 25 ma maximum output current sourced by any i/o pin .................................................................................. ............ 25 ma maximum current sunk by all ports .............................................................................................. ..................... 90 ma maximum current sourced by all ports ........................................................................................... .................. 90 ma note 1: power dissipation is calculated as follows: p dis = v dd x {i dd ? ? i oh } + ? {(v dd ? v oh ) x i oh } + ? (v o l x i ol ). ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. exposure above maximum rating conditions for extended periods may affect device reliability.
PIC18F14K22LIN ds41580a-page 44 preliminary ? 2011 microchip technology inc. figure 8-1: hfintosc frequency accuracy over device v dd and temperature 125 25 2.0 0 60 85 v dd (v) 4.0 5.0 4.5 temperature ( c ) 2.5 3.0 3.5 5.5 1.8 -40 -20 6% 3% 6% 8.1 dc characteristics: rc run supply current, PIC18F14K22LIN PIC18F14K22LIN standard operating conditions (unless otherwise stated) operating temperature -40c ? t a ? +125c for extended param no. device characteristics typ. max. units conditions d008 15.5 19.5 ? a -40c v dd = 5.0v f osc = 31 khz (4) ( rc_run mode, lfintosc source) 16.5 20.5 ? a+25c 20.5 29.5 ? a+85c 30.5 35.5 ? a +125c d009 0.98 0.98 ma -40c to +125c v dd = 5.0v f osc = 1 mhz ( rc_run mode, hfintosc source) d010 4.0 4.7 ma -40c to +125c v dd = 5.0v f osc = 16 mhz ( rc_run mode, hf-intosc source) * these parameters are characterized but not tested. note 1: the test conditions for all i dd measurements in active operation mode ar e: osc1 = external square wave, from rail-to-rail; all i/o pins tri-stated, pulled to v dd ; mclr = v dd ; wdt disabled. 2: the supply current is mainly a function of the operating voltage and frequency. other factors, such as i/o pin loading and switching rate, oscillator type, internal code execution pa ttern and temperature, also have an impact on the current consumption. 3: for rc oscillator configurations, current through r ext is not included. the current through the resistor can be extended by the formula i r = v dd /2r ext (ma) with r ext in k ?? 4: fvr and bor are disabled. 5: when a single temperature range is provided for a paramete r, the specification applies to both industrial and extended temperature devices.
? 2011 microchip technology inc. preliminary ds41580a-page 45 PIC18F14K22LIN 8.2 dc characteristics: rc idle supply current, PIC18F14K22LIN PIC18F14K22LIN standard operating conditions (unless otherwise stated) operating temperature -40c ? t a ? +125c for extended d011 8.5 12.5 ? a -40c v dd = 5.0v f osc = 31 khz (4) ( rc_idle mode, lfintosc source) 9.5 14.5 ? a+25c 13.5 24.5 ? a+85c 24.5 30.5 ? a +125c d012 630 780 ? a -40c to +125c v dd = 5.0v f osc = 1 mhz ( rc_idle mode, hf-intosc source) d013 1.8 2.2 ma -40c to +125c v dd = 5.0v f osc = 16 mhz ( rc_idle mode, hf-intosc source) * these parameters are char acterized but not tested. note 1: the test conditions for all i dd measurements in active operation mode are: osc1 = external square wave, from rail-to-rail; all i/o pins tri-stated, pulled to v dd ; mclr = v dd ; wdt disabled. 2: the supply current is mainly a function of the operating voltage and frequency. other factors, such as i/o pin loading and switching rate, oscillator type, internal code execution pa ttern and temperature, also have an impact on the current consumption. 3: for rc oscillator configurations, current through r ext is not included. the current through the resistor can be extended by the formula i r = v dd /2r ext (ma) with r ext in k ?? 4: fvr and bor are disabled. 5: when a single temperature range is provided for a parameter, the specification applies to both industrial and extended temperature devices.
PIC18F14K22LIN ds41580a-page 46 preliminary ? 2011 microchip technology inc. 8.3 dc characteristics: primary run supply current, PIC18F14K22LIN PIC18F14K22LIN standard operating conditions (unless otherwise stated) operating temperature -40c ? t a ? +125c for extended param no. device characteristics typ. max. units conditions d014 .30 .42 ma -40c to +125c v dd = 5.0v f osc = 1 mhz ( pri_run , ec med osc) d015 3.9 4.4 ma -40c to +125c v dd = 5.0v f osc = 16 mhz ( pri_run , ec high osc) d016 12.1 14.6 ma -40c to +125c v dd = 5.0v f osc = 64 mhz ( pri_run , ec high osc) d017 3.8 4.8 ma -40c to +125c v dd = 5.0v f osc = 4 mhz 16 mhz internal ( pri_run hs+pll ) d018 12.6 15.6 ma -40c to +125c v dd = 5.0v f osc = 16 mhz 64 mhz internal ( pri_run hs+pll ) * these parameters are characterized but not tested. note 1: the test conditions for all i dd measurements in active operation mode are: osc1 = external square wave, from rail-to-rail; all i/o pins tri-stated, pulled to v dd ; mclr = v dd ; wdt disabled. 2: the supply current is mainly a function of the operating voltage and frequency. other factors, such as i/o pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption. 3: for rc oscillator configurations, current through r ext is not included. the current through the resistor can be extended by the formula i r = v dd /2r ext (ma) with r ext in k ?? 4: fvr and bor are disabled. 5: when a single temperature range is provided for a paramete r, the specification applies to both industrial and extended temperature devices.
? 2011 microchip technology inc. preliminary ds41580a-page 47 PIC18F14K22LIN 8.4 dc characteristics: primary idle supply current, PIC18F14K22LIN PIC18F14K22LIN standard operating conditions (unless otherwise stated) operating temperature -40c ? t a ? +125c for extended param no. device characteristics typ. max. units conditions d019 420 455 ? a -40c to +125c v dd = 5.0v f osc = 1 mhz ( pri_idle mode, ec med osc) d020 4.0 4.2 ma -40c to +125c v dd = 5.0v f osc = 16 mhz ( pri_idle mode, ec high osc) d021 5.3 6.3 ma -40c to +125c v dd = 5.0v f osc = 64 mhz ( pri_idle mode, ec high osc) * these parameters are characterized but not tested. note 1: the test conditions for all i dd measurements in active operation mode are: osc1 = external square wave, from rail-to-rail; all i/o pins tri-stated, pulled to v dd ; mclr = v dd ; wdt disabled. 2: the supply current is mainly a function of the operating voltage and frequency. other factors, such as i/o pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption. 3: for rc oscillator configurations, current through r ext is not included. the current through the resistor can be extended by the formula i r = v dd /2r ext (ma) with r ext in k ?? 4: fvr and bor are disabled. 5: when a single temperature range is provided for a parameter, the specification applies to both industrial and extended temperature devices. 8.5 dc characteristics: secondary run supply current, PIC18F14K22LIN PIC18F14K22LIN standard operating conditions (unless otherwise stated) operating temperature -40c ? t a ? +125c for extended param no. device characteristics typ. max. units conditions d022 15.5 19.5 ? a-40c v dd = 5.0v f osc = 32 khz (3) ( sec_run mode, timer1 as clock) 16.5 20.5 ? a+25c 20.5 29.5 ? a+85c 30.5 35.5 ? a +125c * these parameters are characterized but not tested. note 1: the test conditions for all i dd measurements in active operation mode are: osc1 = external square wave, from rail-to-rail; all i/o pins tri-stated, pulled to v dd ; mclr = v dd ; wdt disabled. 2: the supply current is mainly a function of the operating voltage and frequency. other factors, such as i/o pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption. 3: for rc oscillator configurations, current through r ext is not included. the current through the resistor can be extended by the formula i r = v dd /2r ext (ma) with r ext in k ?? 4: fvr and bor are disabled.
PIC18F14K22LIN ds41580a-page 48 preliminary ? 2011 microchip technology inc. 8.6 dc characteristics: secondary idle supply current, PIC18F14K22LIN PIC18F14K22LIN standard operating conditions (unless otherwise stated) operating temperature -40c ? t a ? +125c for extended param no. device characteristics typ. max. units conditions d023 8.5 12.5 ? a-40c v dd = 5.0v f osc = 32 khz (3) ( sec_idle mode, timer1 as clock) 9.5 14.5 ? a+25c 13.5 24.5 ? a+85c 24.5 30.5 ? a +125c * these parameters are characterized but not tested. note 1: the test conditions for all i dd measurements in active operation mode are: osc1 = external square wave, from rail-to-rail; all i/o pins tri-stated, pulled to v dd ; mclr = v dd ; wdt disabled. 2: the supply current is mainly a function of the operating voltage and frequency. other factors, such as i/o pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption. 3: for rc oscillator configurations, current through r ext is not included. the current through the resistor can be extended by the formula i r = v dd /2r ext (ma) with r ext in k ?? 4: fvr and bor are disabled. 8.7 thermal considerations standard operating conditions (unless otherwise stated) operating temperature -40c ? t a ? +125c param no. sym. characteristic typ. units conditions th01 ? ja thermal resistance junction to ambient 108.1 ? c/w 20-pin ssop package th02 ? jc thermal resistance junction to case 24 ? c/w 20-pin ssop package th03 t jmax maximum junction temperature 150 ? c th04 pd power dissipation ? w pd = p internal + p i / o th05 p internal internal power dissipation ? w p internal = i dd x v dd (1) th06 p i / o i/o power dissipation ? w p i / o = ? (i ol * v ol ) + ? (i oh * (v dd - v oh )) th07 p der derated power ? w p der = pd max (t j - t a )/ ? ja (2) legend: tbd = to be determined note 1: i dd is current to run the chip alone wit hout driving any load on the output pins. 2: t a = ambient temperature. 3: t j = junction temperature.
? 2011 microchip technology inc. preliminary ds41580a-page 49 PIC18F14K22LIN 9.0 dc and ac characteristics graphs and tables graphs and tables are not available at this time.
PIC18F14K22LIN ds41580a-page 50 preliminary ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. preliminary ds41580a-page 51 PIC18F14K22LIN 10.0 development support the pic ? microcontrollers and dspic ? digital signal controllers are supported with a full range of software and hardware development tools: ? integrated development environment - mplab ? ide software ? compilers/assemblers/linkers - mplab c compiler for various device families - hi-tech c for various device families - mpasm tm assembler -mplink tm object linker/ mplib tm object librarian - mplab assembler/linker/librarian for various device families ? simulators - mplab sim software simulator ?emulators - mplab real ice? in-circuit emulator ? in-circuit debuggers - mplab icd 3 - pickit? 3 debug express ? device programmers - pickit? 2 programmer - mplab pm3 device programmer ? low-cost demonstration/development boards, evaluation kits, and starter kits 10.1 mplab integrated development environment software the mplab ide software brings an ease of software development previously unseen in the 8/16/32-bit microcontroller market. the mplab ide is a windows ? operating system-based application that contains: ? a single graphical interface to all debugging tools - simulator - programmer (sold separately) - in-circuit emulator (sold separately) - in-circuit debugger (sold separately) ? a full-featured editor with color-coded context ? a multiple project manager ? customizable data windows with direct edit of contents ? high-level source code debugging ? mouse over variable inspection ? drag and drop variables from source to watch windows ? extensive on-line help ? integration of select third party tools, such as iar c compilers the mplab ide allows you to: ? edit your source files (either c or assembly) ? one-touch compile or assemble, and download to emulator and simulator tools (automatically updates all project information) ? debug using: - source files (c or assembly) - mixed c and assembly - machine code mplab ide supports multiple debugging tools in a single development paradigm, from the cost-effective simulators, through low-cost in-circuit debuggers, to full-featured emulators. this eliminates the learning curve when upgrading to tools with increased flexibility and power.
PIC18F14K22LIN ds41580a-page 52 preliminary ? 2011 microchip technology inc. 10.2 mplab c compilers for various device families the mplab c compiler code development systems are complete ansi c compilers for microchip?s pic18, pic24 and pic32 families of microcontrollers and the dspic30 and dspic33 families of digital signal control- lers. these compilers provide powerful integration capabilities, superior code optimization and ease of use. for easy source level debugging, the compilers provide symbol information that is optimized to the mplab ide debugger. 10.3 hi-tech c for various device families the hi-tech c compiler code development systems are complete ansi c compilers for microchip?s pic family of microcontrollers and the dspic family of digital signal controllers. these compilers provide powerful integration capabilities, omniscient code generation and ease of use. for easy source level debugging, the compilers provide symbol information that is optimized to the mplab ide debugger. the compilers include a macro assembler, linker, pre- processor, and one-step driver, and can run on multiple platforms. 10.4 mpasm assembler the mpasm assembler is a full-featured, universal macro assembler for pic10/12/16/18 mcus. the mpasm assembler generates relocatable object files for the mplink object linker, intel ? standard hex files, map files to detail memory usage and symbol reference, absolute lst files that contain source lines and generated machine code and coff files for debugging. the mpasm assembler features include: ? integration into mplab ide projects ? user-defined macros to streamline assembly code ? conditional assembly for multi-purpose source files ? directives that allow complete control over the assembly process 10.5 mplink object linker/ mplib object librarian the mplink object linker combines relocatable objects created by the mpasm assembler and the mplab c18 c compiler. it can link relocatable objects from precompiled libraries, using directives from a linker script. the mplib object librarian manages the creation and modification of library files of precompiled code. when a routine from a library is called from a source file, only the modules that contain that routine will be linked in with the application. this allows large libraries to be used efficiently in many different applications. the object linker/library features include: ? efficient linking of single libraries instead of many smaller files ? enhanced code maintainability by grouping related modules together ? flexible creation of libraries with easy module listing, replacement, deletion and extraction 10.6 mplab assembler, linker and librarian for various device families mplab assembler produces relocatable machine code from symbolic assembly language for pic24, pic32 and dspic devices. mplab c compiler uses the assembler to produce its object file. the assembler generates relocatable object files that can then be archived or linked with other relocatable object files and archives to create an executable file. notable features of the assembler include: ? support for the entire device instruction set ? support for fixed-point and floating-point data ? command line interface ? rich directive set ? flexible macro language ? mplab ide compatibility
? 2011 microchip technology inc. preliminary ds41580a-page 53 PIC18F14K22LIN 10.7 mplab sim software simulator the mplab sim software simulator allows code development in a pc-hosted environment by simulat- ing the pic mcus and dspic ? dscs on an instruction level. on any given instruction, the data areas can be examined or modified and stimuli can be applied from a comprehensive stimulus controller. registers can be logged to files for further run-time analysis. the trace buffer and logic analyzer display extend the power of the simulator to record and track program execution, actions on i/o, most peripherals and internal registers. the mplab sim software simulator fully supports symbolic debugging using the mplab c compilers, and the mpasm and mplab assemblers. the soft- ware simulator offers the flexibility to develop and debug code outside of the hardware laboratory envi- ronment, making it an excellent, economical software development tool. 10.8 mplab real ice in-circuit emulator system mplab real ice in-circuit emulator system is microchip?s next generation high-speed emulator for microchip flash dsc and mcu devices. it debugs and programs pic ? flash mcus and dspic ? flash dscs with the easy-to-use, powerful graphical user interface of the mplab integrated development environment (ide), included with each kit. the emulator is connected to the design engineer?s pc using a high-speed usb 2.0 interface and is connected to the target with either a connector compatible with in- circuit debugger systems (rj11) or with the new high- speed, noise tolerant, low-voltage differential signal (lvds) interconnection (cat5). the emulator is field upgradable through future firmware downloads in mplab ide. in upcoming releases of mplab ide, new devices will be supported, and new features will be added. mplab real ice offers significant advantages over competitive emulators including low-cost, full-speed emulation, run-time variable watches, trace analysis, complex breakpoints, a ruggedized probe interface and long (up to three meters) interconnection cables. 10.9 mplab icd 3 in-circuit debugger system mplab icd 3 in-circuit debugger system is micro- chip's most cost effective high-speed hardware debugger/programmer for microchip flash digital sig- nal controller (dsc) and microcontroller (mcu) devices. it debugs and programs pic ? flash microcon- trollers and dspic ? dscs with the powerful, yet easy- to-use graphical user interface of mplab integrated development environment (ide). the mplab icd 3 in-circuit debugger probe is con- nected to the design engineer's pc using a high-speed usb 2.0 interface and is connected to the target with a connector compatible with the mplab icd 2 or mplab real ice systems (rj-11). mplab icd 3 supports all mplab icd 2 headers. 10.10 pickit 3 in-circuit debugger/ programmer and pickit 3 debug express the mplab pickit 3 allows debugging and program- ming of pic ? and dspic ? flash microcontrollers at a most affordable price point using the powerful graphical user interface of the mplab integrated development environment (ide). the mplab pickit 3 is connected to the design engineer's pc using a full speed usb interface and can be connected to the target via an microchip debug (rj-11) connector (compatible with mplab icd 3 and mplab real ice). the connector uses two device i/o pins and the reset line to imple- ment in-circuit debugging and in-circuit serial pro- gramming?. the pickit 3 debug express include the pickit 3, demo board and microcontroller, hookup cables and cdrom with user?s guide, lessons, tutorial, compiler and mplab ide software.
PIC18F14K22LIN ds41580a-page 54 preliminary ? 2011 microchip technology inc. 10.11 pickit 2 development programmer/debugger and pickit 2 debug express the pickit? 2 development programmer/debugger is a low-cost development tool with an easy to use inter- face for programming and debugging microchip?s flash families of microcontrollers. the full featured windows ? programming interface supports baseline (pic10f, pic12f5xx, pic16f5xx), midrange (pic12f6xx, pic16f), pic18f, pic24, dspic30, dspic33, and pic32 families of 8-bit, 16-bit, and 32-bit microcontrollers, and many microchip serial eeprom products. with microchip?s powerful mplab integrated development environment (ide) the pickit? 2 enables in-circuit debugging on most pic ? microcon- trollers. in-circuit-debugging runs, halts and single steps the program while the pic microcontroller is embedded in the application. when halted at a break- point, the file registers can be examined and modified. the pickit 2 debug express include the pickit 2, demo board and microcontroller, hookup cables and cdrom with user?s guide, lessons, tutorial, compiler and mplab ide software. 10.12 mplab pm3 device programmer the mplab pm3 device programmer is a universal, ce compliant device programmer with programmable voltage verification at v ddmin and v ddmax for maximum reliability. it features a large lcd display (128 x 64) for menus and error messages and a modu- lar, detachable socket assembly to support various package types. the icsp? cable assembly is included as a standard item. in stand-alone mode, the mplab pm3 device programmer can read, verify and program pic devices without a pc connection. it can also set code protection in this mode. the mplab pm3 connects to the host pc via an rs-232 or usb cable. the mplab pm3 has high-speed communications and optimized algorithms for quick programming of large memory devices and incorporates an mmc card for file storage and data applications. 10.13 demonstration/development boards, evaluation kits, and starter kits a wide variety of demonstration, development and evaluation boards for various pic mcus and dspic dscs allows quick application development on fully func- tional systems. most boards include prototyping areas for adding custom circuitry and provide application firmware and source code for examination and modification. the boards support a variety of features, including leds, temperature sensors, switches, speakers, rs-232 interfaces, lcd displays, potentiometers and additional eeprom memory. the demonstration and development boards can be used in teaching environments, for prototyping custom circuits and for learning about various microcontroller applications. in addition to the picdem? and dspicdem? demon- stration/development board series of circuits, microchip has a line of evaluation kits and demonstration software for analog filter design, k ee l oq ? security ics, can, irda ? , powersmart battery management, seeval ? evaluation system, sigma-delta adc, flow rate sensing, plus many more. also available are starter kits that contain everything needed to experience the specified device. this usually includes a single application and debug capability, all on one board. check the microchip web page ( www.microchip.com ) for the complete list of demonstration, development and evaluation kits.
? 2011 microchip technology inc. preliminary ds41580a-page 55 PIC18F14K22LIN 11.0 packaging information 11.1 package marking information legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 20-lead ssop (5.30 mm) example pic18f14k22 lin-i/ss 1110017
PIC18F14K22LIN ds41580a-page 56 preliminary ? 2011 microchip technology inc. 11.2 package details the following section give the technical details of the package.
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? 2011 microchip technology inc. preliminary ds41580a-page 57 PIC18F14K22LIN note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
PIC18F14K22LIN ds41580a-page 58 preliminary ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. preliminary ds41580a-page 59 PIC18F14K22LIN appendix a: revision history revision a (april 2011) initial release of this document.
PIC18F14K22LIN ds41580a-page 60 preliminary ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. preliminary ds41580a-page 61 PIC18F14K22LIN index a a/d associated registers .................................................. 34 absolute maximum ratings ................................................ 43 adc block diagram............................................................. 33 anselh register ............................................................... 30 assembler mpasm assembler..................................................... 52 b baudcon register............................................................ 39 block diagrams adc ............................................................................ 33 PIC18F14K22LIN-500................................................... 6 c c compilers mplab c18 ................................................................ 52 code examples initializing portb....................................................... 23 initializing portc....................................................... 27 customer change notification service ............................... 63 customer notification service............................................. 63 customer support............................................................... 63 d development support ......................................................... 51 e electrical specifications ...................................................... 43 enhanced universal synchronous asynchronous receiver transmitter (eusart)................................. 35 eusart asynchronous lin receiver ....................................... 36 asynchronous mode associated registers, receive ........................... 36 associated registers, transmit .......................... 35 i i/o ports .............................................................................. 23 internet address.................................................................. 63 iocb register..................................................................... 25 l latb register..................................................................... 24 latc register .................................................................... 28 lin/j2602 transceiver and voltage regulator ................... 41 m master synchronous serial port (mssp). see mssp. memory organization.......................................................... 17 microchip internet web site ................................................ 63 mplab asm30 assembler, linker, librarian ..................... 52 mplab integrated development environment software .... 51 mplab pm3 device programmer ...................................... 54 mplab real ice in-circuit emulator system................... 53 mplink object linker/mplib object librarian .................. 52 mssp module overview ........................................................ 31 p packaging information ........................................................ 55 marking ....................................................................... 55 portb register ........................................................... 23, 27 portc associated registers.................................................. 30 portc register......................................................... 27 r rcsta register ................................................................. 38 reader response............................................................... 64 register file summary ................................................. 13, 19 registers anselh (analog select high) ................................... 30 baudcon (eusart baud rate control) ................. 39 iocb (interrupt-on-change portb).......................... 25 latb (portb data latch) ........................................ 24 latc (portc data latch) ........................................ 28 portb ................................................................. 23, 27 rcsta (receive status and control) ........................ 38 trisb (tri-state portb) .................................... 24, 28 wpub (weak pull-up portb)................................... 25 revision history.................................................................. 59 s software simulator (mplab sim) ...................................... 53 special function registers map............................................................................. 12 spi mode (mssp) associated registers.................................................. 31 t thermal considerations...................................................... 48 trisb register............................................................. 24, 28 w wpub register................................................................... 25 www address ................................................................... 63 www, on-line support ..................... .................................. 8
PIC18F14K22LIN ds41580a-page 62 preliminary ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. preliminary ds41580a-page 63 PIC18F14K22LIN the microchip web site microchip provides online support via our www site at www.microchip.com . this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site contains the following information: ? product support ? data sheets and errata, application notes and sample programs, design resources, user?s guides and hardware support documents, latest software releases and archived software ? general technical support ? frequently asked questions (faq), technical support requests, online discussion groups, microchip consultant program member listing ? business of microchip ? product selector and ordering guides, latest microchip press releases, listing of seminars and events, listings of microchip sales offices, distributors and factory representatives customer change notification service microchip?s customer notification service helps keep customers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. to register, access the microchip web site at www.microchip.com . under ?support?, click on ?customer change notification? and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: ? distributor or representative ? local sales office ? field application engineer (fae) ? technical support ? development systems information line customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sales offices and locations is included in the back of this document. technical support is available through the web site at: http://microchip.com/support
PIC18F14K22LIN ds41580a-page 64 preliminary ? 2011 microchip technology inc. reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip product. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outline to provide us with your comments about this document. to: technical publications manager re: reader response total pages sent ________ from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds41580a PIC18F14K22LIN 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this document easy to follow? if not, why? 4. what additions to the document do you think would enhance the structure and subject? 5. what deletions from the document could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document?
? 2011 microchip technology inc. preliminary ds41580a-page 65 PIC18F14K22LIN product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . part no. x /xx xxx pattern package temperature range device device: PIC18F14K22LIN (1) temperature range: e= -40 ? c to +125 ? c (extended) package: ss = ssop pattern: qtp, sqtp, code or special requirements (blank otherwise) examples: a) PIC18F14K22LIN-500e/ss 301 = 5.0v volt- age regulator, extended temp., ssop pack- age, extended v dd limits, qtp pattern #301. note 1: t = in tape and reel ssop package only.
ds41580a-page 66 preliminary ? 2011 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://www.microchip.com/ support web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 cleveland independence, oh tel: 216-447-0464 fax: 216-447-0643 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 indianapolis noblesville, in tel: 317-773-8323 fax: 317-773-5453 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8569-7000 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - chongqing tel: 86-23-8980-9588 fax: 86-23-8980-9500 china - hangzhou tel: 86-571-2819-3180 fax: 86-571-2819-3189 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 asia/pacific india - bangalore tel: 91-80-3090-4444 fax: 91-80-3090-4123 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - yokohama tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-6578-300 fax: 886-3-6578-370 taiwan - kaohsiung tel: 886-7-213-7830 fax: 886-7-330-9305 taiwan - taipei tel: 886-2-2500-6610 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 worldwide sales and service 05/02/11

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